15 MIX MCQ 1

1)The LRU algorithm
a)pages out pages that have not been used recently
b)pages out pages that have been least used recently
c)pages out pages that have been used recently
d)pages out of first page in a given order

ANS :
1)b
In Least Recently Used (LRU) algorithm is a Greedy algorithm where the page to be replaced is
least recently used.

2)Leaf Class is
a)A class with no subclass
b)A class with one subclass
c)A class having exactly two subclass
d)A class having more than one subclasses
ANS:
2)a
a leaf class is a class that should not be subclassed. This can be enforced either by
convention, or by using a language feature such as the final keyword in Java or the sealed
keyword in C#.


3)Interrupt enable instruction is
a)DI
b)EI
c)EPI
d)EAI
ANS:
3)b
The Enable Interrupts (EI) and Disable Interrupts (DI) instructions allow the MP to permit or
deny interrupts under program control. For the EI, the interrupts will be enabled following the completion of the next instruction following the EI. This allows at least one more instruction, perhaps a RET or JMP, to be executed before the MP allows itself to again be interrupted. For the DI, the interrupts are disabled immediately. No ags are aected.
HALT and NO-OP: The Halt (HLT) and No-Operation (NOP) instructions serve general utility
purposes. The Halt will stop the processor from further execution; it can be restarted again
only by an interrupt. A reset signal applied to the MP will abort the Halt. The MP may enter a
Hold state, as the result of another device wanting the bus, from a Halt, but will return to the
Halt state when the Hold is canceled. The NOP is simply a one-byte long place holder, which is passed through automatically without any data motion or action of any kind.

4)TLB is the acronym of
a)Translation Looking Buer
b)Translation Left Buer
c)Translation Look Block
d)Translation Lookaside Buer
ANS:
4)d
TLB(Translation Lookaside Buer)
is a cache that memory management hardware uses to
improve virtual address translation speed. TLBs can suer
performance issues from multitasking and code errors. This performance degradation is called a cache thrash. Cache thrash is caused by an ongoing computer activity that fails to progress due to excessive use of resources or conicts in the caching system.

5)The process of organising the memory into two banks to allow 8 and 16-bit data
operation is called
a)Indexed Mapping
b)Bank-switching
c)Memory Segmentation
d)Two-way memory interleaving
ANS:
5)d
It is a technique for compensating the relatively slow speed of DRAM(Dynamic RAM). In this
technique, the main memory is divided into memory banks which can be accessed
individually without any dependency on the other.A interleaved memory with ‘n’ banks is said to be ‘n’-way interleaved.


6)Feedback property is related to
a)Asynchronous
b)Synchronous
c)Flooding
d)Both(a) and (b)

ANS :
6)b
Feedback property is related to synchronous transmission.It is a data transfer method in
which a continuous stream of data signal is accompanied by timing signal to ensure that
transmitted receiver an in step with each other.


7)SSTF scheduling
a)SSTF chooses the pending request closest to current head position
b)Selects the request with the minimum seek time from the current head position
c)It may cause starvation of some requests
d)All of the above
ANS:
7)d
In SSTF (Shortest Seek Time First), requests having shortest seek time are executed first.
So, the seek time of every request is calculated in advance in queue and then they are scheduled according to their calculated seek time. As a result, the request near the disk arm will get executed first.
SSTF is certainly an improvement over FCFS as it decreases the average
response time and increases the throughput of system.There is great chance of starvation
would take place in SSTF.The reason or this is if there were lot of requests close to each other
the other requests will never be handled since the distance will always be greater.

8)For which of the data structure link lists are not suitable
a)Radix sort
b)Bubble sort
c)Binary search
d)Insertion sort
ANS:
8)c
We can’t apply binary search algorithm directly on linked list because here memory is not
contiguous ,so middle element can’t be found in o(1).We can use two pointer for nding
the middle element and then apply binary search on it.

9)Fetch and decode cycle is not required in
a)Direct addressing
b)Immediate addressing
c)Indirect addressing
d)All of the above
ANS:
9)b
An immediate operand has a constant value or an expression. When an instruction with two
operands uses immediate addressing, the first operand may be a register or memory
location, and the second operand is an immediate constant. The first operand denes the length of the data.

10)Which is the most commonly used transmission speeds in bps used in data
communication
a)1200
b)9600
c)4800
d)2400
ANS
10)b
Data are transmitted at the speed of electricity, but one bit at a time.Typically 8 bits are
required to transmit each character.A normally functioning voice circuit is theoretically able to transmit 9600 bits per second characters per second but the eective
transmission rate is about 1000 characters per second.

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